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BEMICRO CV

Part Information

BEMICRO CV Part Details & Parametric

EU RoHS
Supplier Unconfirmed  
Supported Device 5CEFA2F23C8N
Supported Device Technology FPGA
Type Board
Maximum Clock Rate (MHz) 24/50/100
RAM Size 1GB
Program Memory Size 1KB/16MB
Program Memory Type EEPROM/Flash
Development Software Quartus II
USB 1
RS232 0
I2C 0
SPI 0
GPIO 80
UART 0
Ethernet 0
ADC 0
Push Buttons and Switches 5
Number of LEDs 8
Main Program Memory Type EEPROM/Flash
Taxonomy Development Systems » Evaluation, Development Boards and Kits » Programmable Logic Development Boards and Kits

DEVELOPMENT KITS & TOOLS DETAIL

Block Diagram
Description

BeMicro CV adopts Altera’s 28-nm, low-cost FPGA – Cyclone V. It retains all the benefits of its predecessor including the 80-pin edge connector interface. Users can migrate their designs from BeMicro SDK to BeMicro CV easily. Besides, more user’s GPIOs are available. Moreover, it supports a hard memory controller for DDR3. Users don’t pay much attention to timing closure.

The Altera 5CEFA2F23C8N Cyclone V FPGA resident on the Be Micro CV features a hardened memory controller (HMC) that supports DDR2, DDR3 and LPDDR3. On the BeMicro CV the HMC is connected to a single 16-bit wide, 1Gb DDR3 SDRAM device.

Features
  • One Cyclone V E FPGA (5CEFA2F23C8N) in a 484-pin FineLine BGA (FPGA)
           -25,000 LEs
           -9,434 adaptive logic modules (ALMs)
           -1,760 Kbit (Kb) M10K and 196 Kb MLAB memory
           -4 fractional phase locked loops (PLLs)
           -50 18x18-bit multipliers
           -1 Hard Memory Controller
           -224 general purpose input/output (GPIO)
           -1.1-V core voltage
  • FPGA configuration circuitry
           -Active Serial (AS) x1 configuration (EPCS16I8N)
           -Embedded USB-BlasterTM II for use with the Quartus® II Programmer
           -Separate JTAG configuration header
  • Clocking circuitry
           -50 MHz 1.8V oscillator
           -24 MHz 2.5V oscillator
  • Memory
           -1Gbit DDR3 SDRAM (x16)
           -1K (128 x 8) Two-wire Serial EEPROM
           -Micro SD card slot
  • General user input / output
           -8 user LEDs
           -User Pushbuttons
           -3 User DIP switches
  • Prototyping
           -2 Terasic 40 pin prototyping headers
           -BeMicro SDK 80-pin card edge connector
           -Micro SD card slot
  • Power via USB or via user-provided 5V supply
Reference Designs
Application For End Products Description Designs Details
Field-Programmable Gate Array Embedded PC BeMicro CV, Embedded System Lab. Developing software for an Altera system on a programmable chip requires an understanding of the design flow between the QSys system integration tool and the Nios II Embedded Development Suite (EDS)

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